1. Field
This disclosure relates generally to semiconductor devices, and more specifically, to a temperature dependent timer circuit.
2. Related Art
Semiconductor chip level power management systems are increasingly more complex and can require a host of voltage and current references for low power regulation modes. Examples include, voltage and current references for clocks, voltage and current references for accurate regulation control (includes well bias, source bias and core regulation levels), and current and voltage references for other analog blocks such as comparators and band gap circuits that need to run in low power modes.
Some solutions have proposed special very low power dc references but these solutions can be slow starting, less accurate over temperature and are usually just one fixed value. In newer systems a more accurate refreshed sample and hold reference is being used. One advantage to these systems is more flexibility using an add-on digital-to-analog converter (DAC) or resistor ladder and multipliers that are simultaneously refreshed so that multiple references can be generated. Another advantage to this system is any number of voltages can be generated in a refresh period, but power is conserved with everything off in the hold phase which is significantly longer than the sample phase.
One of the constraints to this system is that the refresh rate is done for worst case conditions, for example, high temperatures of 125 degrees C. A low power clock can run constantly to set the refresh rate, but requires power at nominal temperature and involves switching currents and area on the substrate. It is desirable to reduce space and power overhead for lower power sleep modes.